1. Field of the Invention
The present invention relates generally to the field of programmable integrated circuits (ICs), and more specifically to a method for configuring circuits for programmable ICs.
2. Description of the Background Art
Typical design tools for logical circuits are based on one of two paradigms: they are either language-based (e.g., described in Hardware Description Language, or HDL) or schematic-based (built from illustrations of circuit elements or gates). Many prior art design entry software tools are generic mechanisms for entering any manner of electronic or algorithmic design. The software typically stores the entered data as a database description, and may also process the data and save it as a netlist. A "netlist" is a description of a circuit comprising a list of low-level circuit elements or gates and the connections (nets) between the outputs and inputs thereof. The term "netlist" when used herein refers to either a hierarchical or a flattened netlist. A hierarchical netlist can instantiate (incorporate by reference) lower-level netlists instead of, or in addition to, lower-level elements or gates. A hierarchical netlist can be flattened to include the netlists that were instantiated therein. A flattened netlist does not instantiate any other netlists. A netlist is typically stored as one or more computer files.
Proprietary design entry software tools are created and sold by a number of different vendors, and there is little standardization throughout the industry. As a consequence, each of these tools forties the designer to learn to use the specific tool. This lack of standardization creates difficulties when designs must be translated from one design entry tool to another. Fortunately, the electronics industry is moving towards a common set of standards for the description of design databases and their associated connectivity, so database formats are sometimes compatible. When database formats are not compatible, the translation step takes place at the netlist level, if automated translation is possible at all. When database formats are compatible, the formats can be considered to use a "common language" which permits higher-level translation from one design entry tool to another.
However, the tools and the common database descriptions remain generic (capable of describing a wide variety of circuits) rather than application-specific (designed to describe a single type of circuit application). While a generic description is desirable as an abstraction for general design purposes and may be necessary if translating between different software tooLs, such a description can be limiting when evaluated in the context of a specific application. A specific application may be described in terms of high-level parameters that are relatively easy to understand, such as bus widths, ROM sizes, and the inclusion or omission of specific features. When the circuit is stored in a generic database description, such as a schematic or HDL code, it may be much more difficult to understand or correctly alter the circuit than if the high-level parameters are visually displayed.
In 1985, Silicon Compiler Systems (SCS) introduced a software product that allowed form-based entry of design parameters for logic blocks for custom ICs. This product is described by Edmund K. Cheng and Stanley Mazor on pages 361-405 of "Silicon Compilation", edited by Daniel D. Gajski, published in 1988 by Addison-Wesley Pub. Co., which pages are incorporated herein by reference. The SCS software presented a blank "form" on a computer screen. A limited set of forms was provided, with each form defining a different configurable circuit such as a RAY, ROM, PLA, datapath, or random logic. One such form, directed to a RAM circuit, is shown in FIG. 1. A "blank space" was identified in the form to be edited, and parameters were entered which described the desired behavior of the circuit. The software compiled the information thus entered and produced an IC layout, functional and timing simulation models, and a model for computing power consumption and transient currents. This form-based entry method provided a higher-level description of the desired circuit than the typical language-based or schematic-based entry method. A higher-level description is usually easier for a user to understand and edit. The form-based approach is therefore user-friendly.
In "Designer Series for the X Window System User's Guide", published in 1994 by Actel Corporation of Sunnyvale, Calif., which is incorporated herein by reference, a graphical user interface is described for entering feature selections for Field Programmable Gate Arrays (FPGAs). However, supported functions are limited to logic functions that can be used in many applications, being limited to counters, registers, decoders, adders, and multiplexers. Memory map entry is not: supported. (The term "memory map" as used herein means a representation of a memory space (which may be virtual memory), wherein particular functions or data are addressable at preassigned locations. A memory map is made up of one or more fields, each of which can include more than one addressable memory location.)
Form-based and graphic-based user interfaces are therefore known in the art in the generation of custom and programmable ICs. However, application-specific circuits and other complicated circuits for programmable ICs are typically configured by editing either HDL code descriptions or complicated schematics. (The term "configuring" as used herein means entering or editing the user's vision of a circuit in a format readable by a computer.) In either case, the configuration of the circuit is time-consuming and error-prone. (The term "programmable ICs" as used herein includes but is not limited to FPGAs, mask programmable devices such as Application Specific ICs (ASICs), Programmable Logic Devices (PLDs), and devices in which only a portion of the logic is programmable.) Typically, design parameters entered using one of these prior art interfaces are stored into a design database and then compiled on the same computer.
Table-based formats often preserve valuable information in the form of a higher-level view of the functionality of a circuit than can be provided by displaying complicated schematics or HDL code descriptions. Thus, there is a need for a table-based user interface for configuring application-specific circuits and other complicated circuits for programmable ICs or portions thereof. (The term "table-based format" when used herein means a display that resembles one or more tables. A display in table-based format has one or more "cells" that resemble table cells, and typically each cell represents a different parameter.)